Merge pull request #2662 from blackwarthog/feature16_fixalignas

Revert "Use alignas instead of DV_ALIGNED (#2437)"
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Rodney 2019-11-07 06:50:10 -07:00 committed by GitHub
commit 2ec4f7a223
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4 changed files with 11 additions and 5 deletions

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@ -1349,7 +1349,7 @@ void resample_main_rgbm(TRasterPT<T> rout, const TRasterPT<T> &rin,
namespace {
class alignas(16) TPixelFloat {
DV_ALIGNED(16) class TPixelFloat {
public:
TPixelFloat() : b(0), g(0), r(0), m(0) {}

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@ -34,7 +34,7 @@ extern "C" {
namespace {
class alignas(16) TPixelFloat {
DV_ALIGNED(16) class TPixelFloat {
public:
TPixelFloat() : b(0), g(0), r(0), m(0) {}

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@ -149,6 +149,12 @@ const unsigned int c_maxuint = (unsigned int)(~0U);
#define DV_IMPORT_VAR
#endif
#ifdef _MSC_VER
#define DV_ALIGNED(val) __declspec(align(val))
#else
#define DV_ALIGNED(val) __attribute__((aligned(val)))
#endif
inline short swapShort(short val) { return ((val >> 8) & 0x00ff) | (val << 8); }
inline TINT32 swapTINT32(TINT32 val) {
TINT32 appo, aux, aux1;

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@ -40,7 +40,7 @@ class TPixelGR16;
A set of predefined colors are included as well.
Note that channel ordering is platform depending. */
class DVAPI alignas(4) TPixelRGBM32 {
class DVAPI DV_ALIGNED(4) TPixelRGBM32 {
TPixelRGBM32(TUINT32 mask) { *(TUINT32 *)this = mask; };
public:
@ -154,9 +154,9 @@ dithering
// Since SSE2 mostly require 16 byte aligned, changing 8 byte align to 4 byte
// align will not cause problems.
#if defined(_MSC_VER) && !defined(x64)
class DVAPI alignas(4) TPixelRGBM64 {
class DVAPI DV_ALIGNED(4) TPixelRGBM64 {
#else
class DVAPI alignas(8) TPixelRGBM64 {
class DVAPI DV_ALIGNED(8) TPixelRGBM64 {
#endif
public:
static const int maxChannelValue;