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Decode unknowns in vgpu_unlock_vgpu_t.
The previously unknown members of vgpu_unlock_vgpu_t are now known. They decode to an additional name for the vGPU and the length of the vGPU names. The code has been updated to provide correct values for these members.
This commit is contained in:
Jonathan Johansson
parent
3a4b8e7802
commit
69d59c52bb
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@ -572,189 +572,202 @@ static void vgpu_unlock_hmac_sha256(void* dst,
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typedef struct {
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uint8_t num_blocks; /* Number of 16 byte blocks up to 'sign'. */
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uint16_t unk0;
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uint8_t name1_len; /* Length of first name (unused?) */
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uint8_t name2_len; /* Length of second name (used by VM) */
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uint16_t dev_id;
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uint16_t vend_id; /* Check skipped if zero. */
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uint16_t subsys_id;
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uint16_t subsys_vend_id; /* Check skipped if zero. */
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uint8_t unk1[7];
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char name[31];
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char name1_2[38]; /* First and second name, no separation. */
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uint8_t sign[0x20];
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}
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__attribute__((packed))
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vgpu_unlock_vgpu_t;
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/* Helper macro to initialize the structure above. */
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#define VGPU(dev_id, subsys_id, name) \
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{ (10 + 2 * strlen(name) + 15) / 16, /* num_blocks */ \
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strlen(name), /* name1_len */ \
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strlen(name), /* name2_len */ \
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(dev_id), /* dev_id */ \
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0, /* vend_id */ \
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(subsys_id), /* subsys_id */ \
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0x10de, /* subsys_vend_id */ \
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{ name name } } /* name1_2 */
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static vgpu_unlock_vgpu_t vgpu_unlock_vgpu[] =
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{
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/* Tesla M10 */
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{ 2, 0x1007, 0x13bd, 0, 0x11cc, 0, { 0 }, { "GRID M10-0B" } },
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{ 2, 0x1007, 0x13bd, 0, 0x11cd, 0, { 0 }, { "GRID M10-1B" } },
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{ 2, 0x1007, 0x13bd, 0, 0x1339, 0, { 0 }, { "GRID M10-1B4" } },
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{ 2, 0x1007, 0x13bd, 0, 0x1286, 0, { 0 }, { "GRID M10-2B" } },
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{ 2, 0x1007, 0x13bd, 0, 0x12ee, 0, { 0 }, { "GRID M10-2B4" } },
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{ 2, 0x1007, 0x13bd, 0, 0x11ce, 0, { 0 }, { "GRID M10-0Q" } },
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{ 2, 0x1007, 0x13bd, 0, 0x11cf, 0, { 0 }, { "GRID M10-1Q" } },
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{ 2, 0x1007, 0x13bd, 0, 0x11d0, 0, { 0 }, { "GRID M10-2Q" } },
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{ 2, 0x1007, 0x13bd, 0, 0x11d1, 0, { 0 }, { "GRID M10-4Q" } },
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{ 2, 0x1007, 0x13bd, 0, 0x11d2, 0, { 0 }, { "GRID M10-8Q" } },
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{ 2, 0x1007, 0x13bd, 0, 0x11d3, 0, { 0 }, { "GRID M10-1A" } },
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{ 2, 0x1007, 0x13bd, 0, 0x11d4, 0, { 0 }, { "GRID M10-2A" } },
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{ 2, 0x1007, 0x13bd, 0, 0x11d5, 0, { 0 }, { "GRID M10-4A" } },
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{ 2, 0x1007, 0x13bd, 0, 0x11d6, 0, { 0 }, { "GRID M10-8A" } },
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VGPU(0x13bd, 0x11cc, "GRID M10-0B"),
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VGPU(0x13bd, 0x11cd, "GRID M10-1B"),
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VGPU(0x13bd, 0x1339, "GRID M10-1B4"),
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VGPU(0x13bd, 0x1286, "GRID M10-2B"),
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VGPU(0x13bd, 0x12ee, "GRID M10-2B4"),
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VGPU(0x13bd, 0x11ce, "GRID M10-0Q"),
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VGPU(0x13bd, 0x11cf, "GRID M10-1Q"),
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VGPU(0x13bd, 0x11d0, "GRID M10-2Q"),
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VGPU(0x13bd, 0x11d1, "GRID M10-4Q"),
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VGPU(0x13bd, 0x11d2, "GRID M10-8Q"),
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VGPU(0x13bd, 0x11d3, "GRID M10-1A"),
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VGPU(0x13bd, 0x11d4, "GRID M10-2A"),
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VGPU(0x13bd, 0x11d5, "GRID M10-4A"),
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VGPU(0x13bd, 0x11d6, "GRID M10-8A"),
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/* Tesla M60 */
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{ 2, 0x1007, 0x13f2, 0, 0x114c, 0, { 0 }, { "GRID M60-0Q" } },
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{ 2, 0x1007, 0x13f2, 0, 0x114d, 0, { 0 }, { "GRID M60-1Q" } },
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{ 2, 0x1007, 0x13f2, 0, 0x114e, 0, { 0 }, { "GRID M60-2Q" } },
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{ 2, 0x1007, 0x13f2, 0, 0x114f, 0, { 0 }, { "GRID M60-4Q" } },
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{ 2, 0x1007, 0x13f2, 0, 0x1150, 0, { 0 }, { "GRID M60-8Q" } },
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{ 2, 0x1007, 0x13f2, 0, 0x1176, 0, { 0 }, { "GRID M60-0B" } },
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{ 2, 0x1007, 0x13f2, 0, 0x1177, 0, { 0 }, { "GRID M60-1B" } },
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{ 2, 0x1007, 0x13f2, 0, 0x117D, 0, { 0 }, { "GRID M60-2B" } },
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{ 2, 0x1007, 0x13f2, 0, 0x1337, 0, { 0 }, { "GRID M60-1B4" } },
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{ 2, 0x1007, 0x13f2, 0, 0x12ec, 0, { 0 }, { "GRID M60-2B4" } },
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{ 2, 0x1007, 0x13f2, 0, 0x11ae, 0, { 0 }, { "GRID M60-1A" } },
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{ 2, 0x1007, 0x13f2, 0, 0x11aF, 0, { 0 }, { "GRID M60-2A" } },
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{ 2, 0x1007, 0x13f2, 0, 0x11b0, 0, { 0 }, { "GRID M60-4A" } },
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{ 2, 0x1007, 0x13f2, 0, 0x11b1, 0, { 0 }, { "GRID M60-8A" } },
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VGPU(0x13f2, 0x114c, "GRID M60-0Q"),
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VGPU(0x13f2, 0x114d, "GRID M60-1Q"),
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VGPU(0x13f2, 0x114e, "GRID M60-2Q"),
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VGPU(0x13f2, 0x114f, "GRID M60-4Q"),
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VGPU(0x13f2, 0x1150, "GRID M60-8Q"),
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VGPU(0x13f2, 0x1176, "GRID M60-0B"),
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VGPU(0x13f2, 0x1177, "GRID M60-1B"),
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VGPU(0x13f2, 0x117D, "GRID M60-2B"),
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VGPU(0x13f2, 0x1337, "GRID M60-1B4"),
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VGPU(0x13f2, 0x12ec, "GRID M60-2B4"),
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VGPU(0x13f2, 0x11ae, "GRID M60-1A"),
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VGPU(0x13f2, 0x11aF, "GRID M60-2A"),
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VGPU(0x13f2, 0x11b0, "GRID M60-4A"),
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VGPU(0x13f2, 0x11b1, "GRID M60-8A"),
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/* Tesla P40 */
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{ 2, 0x1007, 0x1b38, 0, 0x11e7, 0, { 0 }, { "GRID P40-1B" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11e8, 0, { 0 }, { "GRID P40-1Q" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11e9, 0, { 0 }, { "GRID P40-2Q" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11ea, 0, { 0 }, { "GRID P40-3Q" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11eb, 0, { 0 }, { "GRID P40-4Q" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11ec, 0, { 0 }, { "GRID P40-6Q" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11ed, 0, { 0 }, { "GRID P40-8Q" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11ee, 0, { 0 }, { "GRID P40-12Q" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11ef, 0, { 0 }, { "GRID P40-24Q" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11f0, 0, { 0 }, { "GRID P40-1A" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11f1, 0, { 0 }, { "GRID P40-2A" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11f2, 0, { 0 }, { "GRID P40-3A" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11f3, 0, { 0 }, { "GRID P40-4A" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11f4, 0, { 0 }, { "GRID P40-6A" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11f5, 0, { 0 }, { "GRID P40-8A" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11f6, 0, { 0 }, { "GRID P40-12A" } },
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{ 2, 0x1007, 0x1b38, 0, 0x11f7, 0, { 0 }, { "GRID P40-24A" } },
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{ 2, 0x1007, 0x1b38, 0, 0x1287, 0, { 0 }, { "GRID P40-2B" } },
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{ 2, 0x1007, 0x1b38, 0, 0x12ef, 0, { 0 }, { "GRID P40-2B4" } },
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{ 2, 0x1007, 0x1b38, 0, 0x133a, 0, { 0 }, { "GRID P40-1B4" } },
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{ 2, 0x1007, 0x1b38, 0, 0x137e, 0, { 0 }, { "GRID P40-24C" } },
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{ 2, 0x1007, 0x1b38, 0, 0x1381, 0, { 0 }, { "GRID P40-4C" } },
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{ 2, 0x1007, 0x1b38, 0, 0x1382, 0, { 0 }, { "GRID P40-6C" } },
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{ 2, 0x1007, 0x1b38, 0, 0x1383, 0, { 0 }, { "GRID P40-8C" } },
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{ 2, 0x1007, 0x1b38, 0, 0x1384, 0, { 0 }, { "GRID P40-12C" } },
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VGPU(0x1b38, 0x11e7, "GRID P40-1B"),
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VGPU(0x1b38, 0x11e8, "GRID P40-1Q"),
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VGPU(0x1b38, 0x11e9, "GRID P40-2Q"),
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VGPU(0x1b38, 0x11ea, "GRID P40-3Q"),
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VGPU(0x1b38, 0x11eb, "GRID P40-4Q"),
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VGPU(0x1b38, 0x11ec, "GRID P40-6Q"),
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VGPU(0x1b38, 0x11ed, "GRID P40-8Q"),
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VGPU(0x1b38, 0x11ee, "GRID P40-12Q"),
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VGPU(0x1b38, 0x11ef, "GRID P40-24Q"),
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VGPU(0x1b38, 0x11f0, "GRID P40-1A"),
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VGPU(0x1b38, 0x11f1, "GRID P40-2A"),
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VGPU(0x1b38, 0x11f2, "GRID P40-3A"),
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VGPU(0x1b38, 0x11f3, "GRID P40-4A"),
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VGPU(0x1b38, 0x11f4, "GRID P40-6A"),
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VGPU(0x1b38, 0x11f5, "GRID P40-8A"),
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VGPU(0x1b38, 0x11f6, "GRID P40-12A"),
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VGPU(0x1b38, 0x11f7, "GRID P40-24A"),
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VGPU(0x1b38, 0x1287, "GRID P40-2B"),
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VGPU(0x1b38, 0x12ef, "GRID P40-2B4"),
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VGPU(0x1b38, 0x133a, "GRID P40-1B4"),
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VGPU(0x1b38, 0x137e, "GRID P40-24C"),
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VGPU(0x1b38, 0x1381, "GRID P40-4C"),
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VGPU(0x1b38, 0x1382, "GRID P40-6C"),
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VGPU(0x1b38, 0x1383, "GRID P40-8C"),
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VGPU(0x1b38, 0x1384, "GRID P40-12C"),
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/* Tesla P4 */
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{ 2, 0x1007, 0x1bb3, 0, 0x1203, 0, { 0 }, { "GRID P4-1B" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x1204, 0, { 0 }, { "GRID P4-1Q" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x1205, 0, { 0 }, { "GRID P4-2Q" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x1206, 0, { 0 }, { "GRID P4-4Q" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x1207, 0, { 0 }, { "GRID P4-8Q" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x1208, 0, { 0 }, { "GRID P4-1A" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x1209, 0, { 0 }, { "GRID P4-2A" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x120a, 0, { 0 }, { "GRID P4-4A" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x120b, 0, { 0 }, { "GRID P4-8A" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x1288, 0, { 0 }, { "GRID P4-2B" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x12f1, 0, { 0 }, { "GRID P4-2B4" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x133c, 0, { 0 }, { "GRID P4-1B4" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x1380, 0, { 0 }, { "GRID P4-8C" } },
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{ 2, 0x1007, 0x1bb3, 0, 0x1385, 0, { 0 }, { "GRID P4-4C" } },
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VGPU(0x1bb3, 0x1203, "GRID P4-1B"),
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VGPU(0x1bb3, 0x1204, "GRID P4-1Q"),
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VGPU(0x1bb3, 0x1205, "GRID P4-2Q"),
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VGPU(0x1bb3, 0x1206, "GRID P4-4Q"),
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VGPU(0x1bb3, 0x1207, "GRID P4-8Q"),
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VGPU(0x1bb3, 0x1208, "GRID P4-1A"),
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VGPU(0x1bb3, 0x1209, "GRID P4-2A"),
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VGPU(0x1bb3, 0x120a, "GRID P4-4A"),
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VGPU(0x1bb3, 0x120b, "GRID P4-8A"),
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VGPU(0x1bb3, 0x1288, "GRID P4-2B"),
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VGPU(0x1bb3, 0x12f1, "GRID P4-2B4"),
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VGPU(0x1bb3, 0x133c, "GRID P4-1B4"),
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VGPU(0x1bb3, 0x1380, "GRID P4-8C"),
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VGPU(0x1bb3, 0x1385, "GRID P4-4C"),
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/* Tesla V100 16GB PCIE */
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{ 2, 0x1007, 0x1db4, 0, 0x1254, 0, { 0 }, { "GRID V100-1A "} },
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{ 2, 0x1007, 0x1db4, 0, 0x1255, 0, { 0 }, { "GRID V100-2A "} },
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{ 2, 0x1007, 0x1db4, 0, 0x1256, 0, { 0 }, { "GRID V100-4A "} },
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{ 2, 0x1007, 0x1db4, 0, 0x1257, 0, { 0 }, { "GRID V100-8A "} },
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{ 2, 0x1007, 0x1db4, 0, 0x1258, 0, { 0 }, { "GRID V100-16A "} },
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{ 2, 0x1007, 0x1db4, 0, 0x124e, 0, { 0 }, { "GRID V100-1B "} },
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{ 2, 0x1007, 0x1db4, 0, 0x128f, 0, { 0 }, { "GRID V100-2B "} },
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{ 2, 0x1007, 0x1db4, 0, 0x1340, 0, { 0 }, { "GRID V100-1B4 "} },
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{ 2, 0x1007, 0x1db4, 0, 0x12f5, 0, { 0 }, { "GRID V100-2B4 "} },
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{ 2, 0x1007, 0x1db4, 0, 0x124f, 0, { 0 }, { "GRID V100-1Q "} },
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{ 2, 0x1007, 0x1db4, 0, 0x1250, 0, { 0 }, { "GRID V100-2Q "} },
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{ 2, 0x1007, 0x1db4, 0, 0x1251, 0, { 0 }, { "GRID V100-4Q "} },
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{ 2, 0x1007, 0x1db4, 0, 0x1252, 0, { 0 }, { "GRID V100-8Q "} },
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{ 2, 0x1007, 0x1db4, 0, 0x1253, 0, { 0 }, { "GRID V100-16Q "} },
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VGPU(0x1db4, 0x1254, "GRID V100-1A"),
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VGPU(0x1db4, 0x1255, "GRID V100-2A"),
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VGPU(0x1db4, 0x1256, "GRID V100-4A"),
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VGPU(0x1db4, 0x1257, "GRID V100-8A"),
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VGPU(0x1db4, 0x1258, "GRID V100-16A"),
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VGPU(0x1db4, 0x124e, "GRID V100-1B"),
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VGPU(0x1db4, 0x128f, "GRID V100-2B"),
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VGPU(0x1db4, 0x1340, "GRID V100-1B4"),
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VGPU(0x1db4, 0x12f5, "GRID V100-2B4"),
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VGPU(0x1db4, 0x124f, "GRID V100-1Q"),
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VGPU(0x1db4, 0x1250, "GRID V100-2Q"),
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VGPU(0x1db4, 0x1251, "GRID V100-4Q"),
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VGPU(0x1db4, 0x1252, "GRID V100-8Q"),
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VGPU(0x1db4, 0x1253, "GRID V100-16Q"),
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/* Quadro RTX 6000 */
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{ 3, 0x1007, 0x1e30, 0, 0x1325, 0, { 0 }, { "GRID RTX6000-1Q" } },
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{ 3, 0x1007, 0x1e30, 0, 0x1326, 0, { 0 }, { "GRID RTX6000-2Q" } },
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{ 3, 0x1007, 0x1e30, 0, 0x1327, 0, { 0 }, { "GRID RTX6000-3Q" } },
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{ 3, 0x1007, 0x1e30, 0, 0x1328, 0, { 0 }, { "GRID RTX6000-4Q" } },
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{ 3, 0x1007, 0x1e30, 0, 0x1329, 0, { 0 }, { "GRID RTX6000-6Q" } },
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{ 3, 0x1007, 0x1e30, 0, 0x132a, 0, { 0 }, { "GRID RTX6000-8Q" } },
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{ 3, 0x1007, 0x1e30, 0, 0x132b, 0, { 0 }, { "GRID RTX6000-12Q" } },
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{ 3, 0x1007, 0x1e30, 0, 0x132c, 0, { 0 }, { "GRID RTX6000-24Q" } },
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{ 3, 0x1007, 0x1e30, 0, 0x13bf, 0, { 0 }, { "GRID RTX6000-4C" } },
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{ 3, 0x1007, 0x1e30, 0, 0x13c0, 0, { 0 }, { "GRID RTX6000-6C" } },
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{ 3, 0x1007, 0x1e30, 0, 0x13c1, 0, { 0 }, { "GRID RTX6000-8C" } },
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{ 3, 0x1007, 0x1e30, 0, 0x13c2, 0, { 0 }, { "GRID RTX6000-12C" } },
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{ 3, 0x1007, 0x1e30, 0, 0x13c3, 0, { 0 }, { "GRID RTX6000-24C" } },
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{ 3, 0x1007, 0x1e30, 0, 0x1437, 0, { 0 }, { "GRID RTX6000-1B" } },
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{ 3, 0x1007, 0x1e30, 0, 0x1438, 0, { 0 }, { "GRID RTX6000-2B" } },
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{ 3, 0x1007, 0x1e30, 0, 0x1439, 0, { 0 }, { "GRID RTX6000-1A" } },
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{ 3, 0x1007, 0x1e30, 0, 0x143a, 0, { 0 }, { "GRID RTX6000-2A" } },
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{ 3, 0x1007, 0x1e30, 0, 0x143b, 0, { 0 }, { "GRID RTX6000-3A" } },
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{ 3, 0x1007, 0x1e30, 0, 0x143c, 0, { 0 }, { "GRID RTX6000-4A" } },
|
||||
{ 3, 0x1007, 0x1e30, 0, 0x143d, 0, { 0 }, { "GRID RTX6000-6A" } },
|
||||
{ 3, 0x1007, 0x1e30, 0, 0x143e, 0, { 0 }, { "GRID RTX6000-8A" } },
|
||||
{ 3, 0x1007, 0x1e30, 0, 0x143f, 0, { 0 }, { "GRID RTX6000-12A" } },
|
||||
{ 3, 0x1007, 0x1e30, 0, 0x1440, 0, { 0 }, { "GRID RTX6000-24A" } },
|
||||
VGPU(0x1e30, 0x1325, "GRID RTX6000-1Q"),
|
||||
VGPU(0x1e30, 0x1326, "GRID RTX6000-2Q"),
|
||||
VGPU(0x1e30, 0x1327, "GRID RTX6000-3Q"),
|
||||
VGPU(0x1e30, 0x1328, "GRID RTX6000-4Q"),
|
||||
VGPU(0x1e30, 0x1329, "GRID RTX6000-6Q"),
|
||||
VGPU(0x1e30, 0x132a, "GRID RTX6000-8Q"),
|
||||
VGPU(0x1e30, 0x132b, "GRID RTX6000-12Q"),
|
||||
VGPU(0x1e30, 0x132c, "GRID RTX6000-24Q"),
|
||||
VGPU(0x1e30, 0x13bf, "GRID RTX6000-4C"),
|
||||
VGPU(0x1e30, 0x13c0, "GRID RTX6000-6C"),
|
||||
VGPU(0x1e30, 0x13c1, "GRID RTX6000-8C"),
|
||||
VGPU(0x1e30, 0x13c2, "GRID RTX6000-12C"),
|
||||
VGPU(0x1e30, 0x13c3, "GRID RTX6000-24C"),
|
||||
VGPU(0x1e30, 0x1437, "GRID RTX6000-1B"),
|
||||
VGPU(0x1e30, 0x1438, "GRID RTX6000-2B"),
|
||||
VGPU(0x1e30, 0x1439, "GRID RTX6000-1A"),
|
||||
VGPU(0x1e30, 0x143a, "GRID RTX6000-2A"),
|
||||
VGPU(0x1e30, 0x143b, "GRID RTX6000-3A"),
|
||||
VGPU(0x1e30, 0x143c, "GRID RTX6000-4A"),
|
||||
VGPU(0x1e30, 0x143d, "GRID RTX6000-6A"),
|
||||
VGPU(0x1e30, 0x143e, "GRID RTX6000-8A"),
|
||||
VGPU(0x1e30, 0x143f, "GRID RTX6000-12A"),
|
||||
VGPU(0x1e30, 0x1440, "GRID RTX6000-24A"),
|
||||
|
||||
/* Tesla T4 */
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x1309, 0, { 0 }, { "GRID T4-1B" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x130a, 0, { 0 }, { "GRID T4-2B" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x130b, 0, { 0 }, { "GRID T4-2B4" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x130c, 0, { 0 }, { "GRID T4-1Q" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x130d, 0, { 0 }, { "GRID T4-2Q" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x130e, 0, { 0 }, { "GRID T4-4Q" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x130f, 0, { 0 }, { "GRID T4-8Q" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x1310, 0, { 0 }, { "GRID T4-16Q" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x1311, 0, { 0 }, { "GRID T4-1A" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x1312, 0, { 0 }, { "GRID T4-2A" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x1313, 0, { 0 }, { "GRID T4-4A" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x1314, 0, { 0 }, { "GRID T4-8A" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x1315, 0, { 0 }, { "GRID T4-16A" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x1345, 0, { 0 }, { "GRID T4-1B4" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x1375, 0, { 0 }, { "GRID T4-16C" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x139a, 0, { 0 }, { "GRID T4-4C" } },
|
||||
{ 2, 0x1007, 0x1eb8, 0, 0x139b, 0, { 0 }, { "GRID T4-8C" } },
|
||||
VGPU(0x1eb8, 0x1309, "GRID T4-1B"),
|
||||
VGPU(0x1eb8, 0x130a, "GRID T4-2B"),
|
||||
VGPU(0x1eb8, 0x130b, "GRID T4-2B4"),
|
||||
VGPU(0x1eb8, 0x130c, "GRID T4-1Q"),
|
||||
VGPU(0x1eb8, 0x130d, "GRID T4-2Q"),
|
||||
VGPU(0x1eb8, 0x130e, "GRID T4-4Q"),
|
||||
VGPU(0x1eb8, 0x130f, "GRID T4-8Q"),
|
||||
VGPU(0x1eb8, 0x1310, "GRID T4-16Q"),
|
||||
VGPU(0x1eb8, 0x1311, "GRID T4-1A"),
|
||||
VGPU(0x1eb8, 0x1312, "GRID T4-2A"),
|
||||
VGPU(0x1eb8, 0x1313, "GRID T4-4A"),
|
||||
VGPU(0x1eb8, 0x1314, "GRID T4-8A"),
|
||||
VGPU(0x1eb8, 0x1315, "GRID T4-16A"),
|
||||
VGPU(0x1eb8, 0x1345, "GRID T4-1B4"),
|
||||
VGPU(0x1eb8, 0x1375, "GRID T4-16C"),
|
||||
VGPU(0x1eb8, 0x139a, "GRID T4-4C"),
|
||||
VGPU(0x1eb8, 0x139b, "GRID T4-8C"),
|
||||
|
||||
/* RTX A40 */
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14d5, 0, { 0 }, { "NVIDIA A40-1B" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14d6, 0, { 0 }, { "NVIDIA A40-2B" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14d7, 0, { 0 }, { "NVIDIA A40-1Q" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14d8, 0, { 0 }, { "NVIDIA A40-2Q" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14d9, 0, { 0 }, { "NVIDIA A40-3Q" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14da, 0, { 0 }, { "NVIDIA A40-4Q" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14db, 0, { 0 }, { "NVIDIA A40-6Q" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14dc, 0, { 0 }, { "NVIDIA A40-8Q" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14dd, 0, { 0 }, { "NVIDIA A40-12Q" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14de, 0, { 0 }, { "NVIDIA A40-16Q" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14df, 0, { 0 }, { "NVIDIA A40-24Q" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14e0, 0, { 0 }, { "NVIDIA A40-48Q" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14e1, 0, { 0 }, { "NVIDIA A40-1A" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14e2, 0, { 0 }, { "NVIDIA A40-2A" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14e3, 0, { 0 }, { "NVIDIA A40-3A" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14e4, 0, { 0 }, { "NVIDIA A40-4A" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14e5, 0, { 0 }, { "NVIDIA A40-6A" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14e6, 0, { 0 }, { "NVIDIA A40-8A" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14e7, 0, { 0 }, { "NVIDIA A40-12A" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14e8, 0, { 0 }, { "NVIDIA A40-16A" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14e9, 0, { 0 }, { "NVIDIA A40-24A" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14ea, 0, { 0 }, { "NVIDIA A40-48A" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14f3, 0, { 0 }, { "NVIDIA A40-4C" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14f4, 0, { 0 }, { "NVIDIA A40-6C" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14f5, 0, { 0 }, { "NVIDIA A40-8C" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14f6, 0, { 0 }, { "NVIDIA A40-12C" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14f7, 0, { 0 }, { "NVIDIA A40-16C" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14f8, 0, { 0 }, { "NVIDIA A40-24C" } },
|
||||
{ 2, 0x1007, 0x2235, 0, 0x14f9, 0, { 0 }, { "NVIDIA A40-48C" } },
|
||||
VGPU(0x2235, 0x14d5, "NVIDIA A40-1B"),
|
||||
VGPU(0x2235, 0x14d6, "NVIDIA A40-2B"),
|
||||
VGPU(0x2235, 0x14d7, "NVIDIA A40-1Q"),
|
||||
VGPU(0x2235, 0x14d8, "NVIDIA A40-2Q"),
|
||||
VGPU(0x2235, 0x14d9, "NVIDIA A40-3Q"),
|
||||
VGPU(0x2235, 0x14da, "NVIDIA A40-4Q"),
|
||||
VGPU(0x2235, 0x14db, "NVIDIA A40-6Q"),
|
||||
VGPU(0x2235, 0x14dc, "NVIDIA A40-8Q"),
|
||||
VGPU(0x2235, 0x14dd, "NVIDIA A40-12Q"),
|
||||
VGPU(0x2235, 0x14de, "NVIDIA A40-16Q"),
|
||||
VGPU(0x2235, 0x14df, "NVIDIA A40-24Q"),
|
||||
VGPU(0x2235, 0x14e0, "NVIDIA A40-48Q"),
|
||||
VGPU(0x2235, 0x14e1, "NVIDIA A40-1A"),
|
||||
VGPU(0x2235, 0x14e2, "NVIDIA A40-2A"),
|
||||
VGPU(0x2235, 0x14e3, "NVIDIA A40-3A"),
|
||||
VGPU(0x2235, 0x14e4, "NVIDIA A40-4A"),
|
||||
VGPU(0x2235, 0x14e5, "NVIDIA A40-6A"),
|
||||
VGPU(0x2235, 0x14e6, "NVIDIA A40-8A"),
|
||||
VGPU(0x2235, 0x14e7, "NVIDIA A40-12A"),
|
||||
VGPU(0x2235, 0x14e8, "NVIDIA A40-16A"),
|
||||
VGPU(0x2235, 0x14e9, "NVIDIA A40-24A"),
|
||||
VGPU(0x2235, 0x14ea, "NVIDIA A40-48A"),
|
||||
VGPU(0x2235, 0x14f3, "NVIDIA A40-4C"),
|
||||
VGPU(0x2235, 0x14f4, "NVIDIA A40-6C"),
|
||||
VGPU(0x2235, 0x14f5, "NVIDIA A40-8C"),
|
||||
VGPU(0x2235, 0x14f6, "NVIDIA A40-12C"),
|
||||
VGPU(0x2235, 0x14f7, "NVIDIA A40-16C"),
|
||||
VGPU(0x2235, 0x14f8, "NVIDIA A40-24C"),
|
||||
VGPU(0x2235, 0x14f9, "NVIDIA A40-48C"),
|
||||
|
||||
{ 0 } /* Sentinel */
|
||||
};
|
||||
|
||||
#undef VGPU
|
||||
|
||||
static const uint8_t vgpu_unlock_magic_start[0x10] = {
|
||||
0xf3, 0xf5, 0x9e, 0x3d, 0x13, 0x91, 0x75, 0x18,
|
||||
0x6a, 0x7b, 0x55, 0xed, 0xce, 0x5d, 0x84, 0x67
|
||||
|
|
|
|||
Loading…
Reference in a new issue